A PLL’s LOCK indication is often mistaken for proof of true synchronization, but in reality it only confirms that the loop is operating within its internal lock window. A rubidium standard will output a clean 10 MHz sine wave whether it is free‑running or actually disciplined, and a PLL can assert LOCK even when the residual phase error remains significant. This happens because the lock range is always wider than the capture range, meaning a loop can settle into a stable tracking state without ever having fully captured the reference phase.
Because of this, observing a 10 MHz signal and a LOCK pin does not demonstrate phase coherence. Rubidium oscillators have excellent short‑term stability but they do drift, and without external comparison the PLL cannot distinguish between a stable free‑running Rb output and one that is genuinely synchronized. The loop may appear calm, the control voltage may sit in a normal region, and the LOCK indicator may be asserted, yet the disciplined output can still be substantially out of phase with a true reference.
Therefore, a more rigorous standard is required before declaring operational success. True rubidium discipline can only be confirmed by comparing the Rb output against a known coherent reference such as a GPSDO using a phase comparator or time‑interval counter. Only a direct phase comparison reveals whether the PLL has actually captured the reference or is merely tracking it, and until such a comparison is performed, neither a sine wave nor a LOCK signal can be taken as evidence of genuine synchronization.
Adrian